View AAT3242ITP-IQ-T1_1937590.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 1 powerlinear ? general description the aat3242 is a dual low dropout linear regulator with power ok (pok) outputs. two integrated reg- ulators provide a high power 300ma output and a lower power 150ma output, making this device ideal for use with microprocessors and dsp cores in portable products. two pok pins provide open drain output signals when their respective regulator output is within regulation. the aat3242 has inde- pendent input voltage and enable pins for increased design flexibility. this device features a very low quiescent current (140a typical) and low dropout voltages (typically 200mv and 400mv at the full output current level), making it ideal for portable applications where extended battery life is critical. the aat3242 has complete over-current/short-cir- cuit and over-temperature protection circuits to guard against extreme operating conditions. the aat3242 is available in a space-saving, pb- free, 12-pin tsopjw package. this device is capable of operation over the -40c to +85c tem- perature range. features ? high/low current outputs, 300ma/150ma ? low dropout: ? ldo a: 400mv at 300ma ? ldo b: 200mv at 150ma ? high output voltage accuracy: 1.5% ? high psrr: 65db at 1khz ? 70a quiescent current for each ldo ? over-current/short-circuit protection ? over-temperature protection ? two pok outputs ? independent power and enable inputs ? uses low equivalent series resistance (esr) ceramic capacitors ? 12-pin tsopjw package ? -40c to +85c temperature range applications ? cellular phones ? digital cameras ? handheld instruments ? microprocessor / dsp core / i/o power ? notebook computers ? pdas and handheld computers ? portable communication devices typical application aat3242 2.2 f 100k 2.2 f enable b enable a vin output a output b poka 100k pokb poka outa outb pokb gnd enb inb ina ena
aat3242 300ma/150ma dual cmos ldo linear regulator 2 3242.2006.04.1.10 pin descriptions pin configuration tsopjw-12 (top view) pin # symbol function 1 ena enable regulator a pin; this pin should not be left floating. when pulled low, the pmos pass transistor turns off and the device enters shutdown mode, consuming less than 1a. 2, 3, 8, 9 gnd ground connection pins. 4 poka power ok pin with open drain output. it is pulled low when the outa pin is below the 10% regulation window. 5 outb low current (150ma) regulator output pin; should be decoupled with a 2.2f or greater output low-esr ceramic capacitor. 6 inb input voltage pin for regulator b; should be decoupled with 1f or greater capacitor. 7 enb enable regulator b; this pin should not be left floating. when pulled low, the pmos pass transistor turns off and the device enters shutdown mode, con- suming less than 1a. 10 pokb power ok pin with open drain output. it is pulled low when the outb pin is below the 10% regulation window. 11 outa high-current (300ma) regulator output pin; should be decoupled with a 2.2f or greater output low-esr ceramic capacitor. 12 ina input voltage pin for regulator a; should be decoupled with 1f or greater capacitor. 1 2 3 4 5 6 12 11 10 9 8 7 ena gnd gnd poka outb inb ina out a pokb gnd gnd enb
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 3 absolute maximum ratings 1 thermal information symbol description value units ja thermal resistance 3 110 c/w p d maximum power dissipation (t a = 25c) 4 909 mw symbol description value units v in input voltage 6.0 v v enin(max) maximum en to input voltage 0.3 v i out 2 dc output current p d /(v in - v o )ma t j operating junction temperature range -40 to 150 c t lead maximum soldering temperature (at leads, 10 sec) 300 c 1. stresses above those listed in absolute maximum ratings may cause permanent damage to the device. functional operation at c ondi- tions other than the operating conditions specified is not implied. only one absolute maximum rating should be applied at any one time. 2. based on long-term current density limitation. 3. mounted on an fr4 board. 4. derate 9.1mw/c above 25c.
aat3242 300ma/150ma dual cmos ldo linear regulator 4 3242.2006.04.1.10 electrical characteristics 1 v in = v out(nom) + 1.0v for v out options greater than 1.5v. v in = 2.5v for v out 1.5v. i out = 1.0ma, c out = 2.2f, c in = 1.0f, t a = -40c to +85c, unless otherwise noted. typical values are t a = 25c. symbol description conditions min typ max units ldo a; i out = 300ma v out output voltage tolerance i out = 1ma t a = 25c -1.5 1.5 % to 300ma t a = -40 to 85c -2.5 2.5 v in input voltage v out + v do 5 5.5 v v do dropout voltage 2, 3 i out = 300ma 400 600 mv v out / line regulation 4 v in = v out + 1 to 5.0 v 0.09 %/v v out * v in v out(line) dynamic line regulation i out = 300ma, v in = v out + 1 5.0 mv to v out + 2, t r /t f = 2s v out(load) dynamic load regulation i out = 1ma to 300ma, 60 mv t r <5s v en(l) enable threshold low 0.6 v v en(h) enable threshold high 1.5 v v pok power ok trip threshold v out rising, t a = 25c 90 94 98 % of v out v pokhys power ok hysteresis 1.0 % of v out v pok(lo) power ok output voltage low i sink = 1ma 0.4 v i pok pok output leakage current v pok < 5.5v, v out in regulation 1.0 a i out output current v out > 1.2v 300 ma i sc short-circuit current v out < 0.4v 600 ma i q ground current v in = 5v, no load; en a = v in 70 125 a i sd shutdown current v in = 5v, en a = 0v 1.0 a 1khz 65 psrr power supply rejection ratio i out =1 0ma 10khz 45 db 1mhz 42 t sd over-temperature shutdown 145 c threshold t hys over-temperature shutdown 12 c hysteresis e n output noise e nbw = 300hz to 50khz 250 vrms t c output voltage temperature 22 ppm/c coefficient 1. the aat3242 is guaranteed to meet performance specifications over the -40c to +85c operating temperature range and is assu red by design, characterization, and correlation with statistical process controls. 2. v do is defined as v in - v out when v out is 98% of nominal. 3. for v out < 2.1v, v do = 2.5 - v out . 4. c in = 10f. 5. to calculate minimum input voltage, use the following equation: v in(min) = v out(max) + v do(max) as long as v in 2.5v.
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 5 electrical characteristics 1 (continued) v in = v out(nom) + 1.0v for v out options greater than 1.5v. v in = 2.5v for v out 1.5v. i out = 1.0ma, c out = 2.2f, c in = 1.0f, t a = -40c to +85c, unless otherwise noted. typical values are t a = 25c. symbol description conditions min typ max units ldo b; i out = 150ma v out output voltage tolerance i out = 1ma t a = 25c -1.5 1.5 % to 150ma t a = -40 to 85c -2.5 2.5 v in input voltage v out + v do 5 5.5 v v do dropout voltage 2, 3 i out = 150ma 200 300 mv v out / line regulation 4 v in = v out + 1 to 5.0 v 0.09 %/v v out * v in v out(line) dynamic line regulation i out = 150ma, v in = v out + 1 5.0 mv to v out + 2, t r /t f = 2s v out(load) dynamic load regulation i out = 1ma to 150ma, t r <5s 60 mv v en(l) enable threshold low 0.6 v v en(h) enable threshold high 1.5 v v pok power ok trip threshold v out rising, t a = 25c 90 94 98 % of v out v pokhys power ok hysteresis 1.0 % of v out v pok(lo) power ok output voltage low i sink = 1ma 0.4 v i pok pok output leakage current v pok < 5.5v, v out in regulation 1.0 a i out output current v out > 1.2v 150 ma i sc short-circuit current v out < 0.4v 600 ma i q ground current v in = 5v, no load; en b = v in 70 125 a 1khz 65 psrr power supply rejection ratio i out = 10ma 10khz 45 db 1mhz 42 t sd over-temperature shutdown 145 c threshold t hys over-temperature shutdown 12 c hysteresis e n output noise e nbw = 300hz to 50khz 250 vrms t c output voltage temperature 22 ppm/c coefficient 1. the aat3242 is guaranteed to meet performance specifications over the -40c to +85c operating temperature range and is assu red by design, characterization, and correlation with statistical process controls. 2. v do is defined as v in - v out when v out is 98% of nominal. 3. for v out < 2.3v, v do = 2.5 - v out . 4. c in = 10f. 5. to calculate minimum input voltage, use the following equation: v in(min) = v out(max) + v do(max) as long as v in 2.5v.
aat3242 300ma/150ma dual cmos ldo linear regulator 6 3242.2006.04.1.10 typical characteristics unless otherwise noted, v in = 5v, t a = 25c. output voltage vs. temperature 1.196 1.197 1.198 1.199 1.200 1.201 1.202 1.203 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 temperature ( quiescent current vs. temperature 0 10 20 30 40 50 60 70 80 90 100 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( ground current vs. input voltage 0 10 20 30 40 50 60 70 80 90 2 2.5 3 3.5 4.5 45 input voltage (v) ground current ( i out = 0ma i out = 10ma i out = 50ma i out = 150ma i out = 300ma dropout voltage vs. output current 0 50 100 150 200 250 300 350 400 450 500 0 50 100 150 200 250 300 output current (ma) dropout voltage (mv) 85 c 25 c -40 c dropout characteristics 2.00 2.20 2.40 2.60 2.80 3.00 3.20 2.70 2.80 2.90 3.00 3.10 3.20 3.30 input voltage (v) output voltage (v) i out = 300ma i out = 150ma i out = 100ma i out = 50ma i out = 10ma i out = 0ma dropout voltage vs. temperature 0 60 120 180 240 300 360 420 480 540 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( i l = 300ma i l = 150ma i l = 100ma i l = 50ma
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 7 typical characteristics unless otherwise noted, v in = 5v, t a = 25c. over-current protection -200 0 200 400 600 800 1000 1200 time (20ms/div) output current (ma) pok output response time (200 v in (2v/div) v out (2v/div) v pok (1v/div) load transient response 300ma 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 time (10 -100 0 100 200 300 400 500 600 700 800 output current (ma) v out i out load transient response 2.60 2.65 2.70 2.75 2.80 2.85 2.90 time (100 -100 0 100 200 300 400 500 output current (ma) i out v out line transient response 2.85 2.90 2.95 3.00 3.05 3.10 3.15 3.20 3.25 time (100 -2 -1 0 1 2 3 4 5 6 input voltage (v) v in v out turn-on time and pok delay time (10 v enable (2v/div) v out (500mv/div) v pok (500mv/div)
aat3242 300ma/150ma dual cmos ldo linear regulator 8 3242.2006.04.1.10 typical characteristics unless otherwise noted, v in = 5v, t a = 25c. v en(h) and v en(l) vs. v in 1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 2.5 3.0 3.5 4.0 4.5 5.0 5 . input voltage (v) v en (v) v en(h) v en(l) self noise 0.01 0.1 1 10 0.01 0.1 1 10 100 1000 frequency (khz) noise amplitude (
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 9 functional description the aat3242 is a high performance dual ldo reg- ulator with two power ok pins. the first regulator (a) sources 300ma of current, while the second (b) regulator can deliver 150ma. each regulator has an integrated power ok comparator which indi- cates when the respective output is out of regula- tion. the pok pins are open drain outputs, and they are held low when the respective regulator is in shutdown mode. the device has independent enable pins to shut down each ldo regulator for power conservation in portable products. forcing en a/b low (<0.6v) powers down the regulators and draws a maximum of 1.0a. the aat3242 has short-circuit and ther- mal protection in case of adverse operating condi- tions. device power dissipation is limited to the package type and thermal dissipation properties. refer to the thermal considerations section of this datasheet for details on device operation at maxi- mum output current loads. functional block diagram error amplifier over-current protection over - temperature protection voltage reference + - ina ena pok a out a 91% v ref + - error amplifier over-current protection over - temperature protection voltage reference + - inb enb pokb gnd outb 91% v ref + -
aat3242 300ma/150ma dual cmos ldo linear regulator 10 3242.2006.04.1.10 applications information to assure the maximum possible performance is obtained from the aat3242, please refer to the fol- lowing application recommendations. input capacitor a 1f or larger capacitor is typically recommended for c in in most applications. a c in capacitor is not required for basic ldo regulator operation; howev- er, if the aat3242 is physically located more than three centimeters from an input power source, a c in capacitor will be needed for stable operation. c in should be located as closely to the device v in pin as practically possible. c in values greater than 1f will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. ceramic, tantalum, or aluminum electrolytic capac- itors may be selected for c in . there is no specific capacitor esr requirement for c in ; however, for 300ma ldo regulator output operation, ceramic capacitors are recommended for c in due to their inherent capability over tantalum capacitors to with- stand input current surges from low impedance sources such as batteries in portable devices. output capacitor for proper load voltage regulation and operational stability, a capacitor is required between pins v out and gnd. the c out capacitor connection to the ldo regulator ground pin should be made as direct as practically possible for maximum device per- formance. the aat3242 has been specifically designed to function with very low esr ceramic capacitors. for best performance, ceramic capaci- tors are recommended. typical output capacitor values for maximum out- put current conditions range from 1f to 10f. applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the aat3242 should use 2.2f or greater for c out . if desired, c out may be increased without limit. in low output current applications where output load is less than 10ma, the minimum value for c out can be as low as 0.47f. capacitor characteristics ceramic composition capacitors are highly recom- mended over all other types of capacitors for use with the aat3242. ceramic capacitors offer many advantages over their tantalum and aluminum elec- trolytic counterparts. a ceramic capacitor typically has very low esr, is lower cost, has a smaller pcb footprint, and is non-polarized. line and load tran- sient response of the ldo regulator is improved by using low esr ceramic capacitors. since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. equivalent series resistance esr is a very important characteristic to consider when selecting a capacitor. esr is the internal series resistance associated with a capacitor that includes lead resistance, internal connections, size and area, material composition, and ambient tem- perature. typically, capacitor esr is measured in milliohms for ceramic capacitors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors. ceramic capacitor materials ceramic capacitors less than 0.1f are typically made from npo or c0g materials. npo and c0g materials generally have tight tolerance and are very stable over temperature. larger capacitor val- ues are usually composed of x7r, x5r, z5u, or y5v dielectric materials. these two material types are not recommended for use with ldo regulators since the capacitor tolerance can vary more than 50% over the operating temperature range of the device. a 2.2f y5v capacitor could be reduced to 1f over temperature; this could cause problems for circuit operation. x7r and x5r dielectrics are much more desirable. the temperature tolerance
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 11 of x7r dielectric is better than 15%. capacitor area is another contributor to esr. capacitors which are physically large in size will have a lower esr when compared to a smaller sized capacitor of an equivalent material and capacitance value. these larger devices can improve circuit transient response when compared to an equal value capac- itor in a smaller package size. consult capacitor vendor datasheets carefully when selecting capac- itors for ldo regulators. pok output the aat3242 features integrated power ok com- parators which can be used as an error flag. the pok open drain output goes low when output volt- age is 6% (typ) below its nominal regulation volt- age. additionally, any time one of the regulators is in shutdown, the respective pok output is pulled low. connect a pull-up resistor from poka to outa, and pokb to outb. enable function the aat3242 features an ldo regulator enable/dis- able function. each ldo has its own dedicated enable pin. these pins (en) are active high and are compatible with cmos logic. to assure the ldo regulators will switch on, ena/b must be greater than 1.6v. the ldo regulators will shut down when the voltage on the ena/b pins falls below 0.6v. in shutdown, the aat3242 will consume less than 1.0a of current. if the enable function is not need- ed in a specific application, it may be tied to v in to keep the ldo regulator in a continuously on state. when the ldo regulators are in shutdown mode, an internal 20 resistor is connected between v out and gnd. this is intended to discharge c out when the ldo regulators are disabled. the internal 20 has no adverse effects on device turn-on time. short-circuit protection the aat3242 contains internal short-circuit protec- tion that will trigger when the output load current exceeds the internal threshold limit. under short- circuit conditions, the output of the ldo regulator will be current limited until the short-circuit condi- tion is removed from the output or ldo regulator package power dissipation exceeds the device thermal limit. thermal protection the aat3242 has an internal thermal protection cir- cuit which will turn on when the device die temper- ature exceeds 145c. the ldo regulator output will remain in a shutdown state until the internal die temperature falls back below the 145c trip point. the combination and interaction between the short- circuit and thermal protection systems allows the ldo regulators to withstand indefinite short-circuit conditions without sustaining permanent damage. no-load stability the aat3242 is designed to maintain output volt- age regulation and stability under operational no- load conditions. this is an important characteristic for applications where the output current may drop to zero. reverse output-to-input voltage conditions and protection under normal operating conditions, a parasitic diode exists between the output and input of the ldo reg- ulator. the input voltage should always remain greater than the output load voltage maintaining a reverse bias on the internal parasitic diode. conditions where v out might exceed v in should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the v out pin, possibly damaging the ldo regulator. in applications where there is a possibility of v out exceeding v in for brief amounts of time during nor- mal operation, the use of a larger value c in capaci- tor is highly recommended. a larger value of c in with respect to c out will effect a slower c in decay rate during shutdown, thus preventing v out from exceeding v in . in applications where there is a greater danger of v out exceeding v in for extended periods of time, it is recommended to place a schottky diode across v in to v out (connecting the cathode to v in and anode to v out ). the schottky diode forward voltage should be less than 0.45v.
aat3242 300ma/150ma dual cmos ldo linear regulator 12 3242.2006.04.1.10 thermal considerations and high output current applications the aat3242 is designed to deliver continuous output load currents of 300ma and 150ma under normal operations, and can supply up to 500ma during circuit start-up conditions. this is desirable for circuit applications where there might be a brief high in-rush current during a power-on event. the limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. in order to obtain high operating currents, careful device layout and circuit operating conditions need to be taken into account. the following discussions will assume the ldo regulator is mounted on a printed circuit board uti- lizing the minimum recommended footprint as stat- ed in the layout considerations section of this doc- ument. at any given ambient temperature (t a ), the maximum package power dissipation can be deter- mined by the following equation: constants for the aat3242 are t j(max) (the maxi- mum junction temperature for the device, which is 125c) and ja = 110c/w (the package thermal resistance). typically, maximum conditions are cal- culated at the maximum operating temperature of t a = 85c and under normal ambient conditions where t a = 25c. given t a = 85c, the maximum package power dissipation is 364mw. at t a = 25c, the max- imum package power dissipation is 909mw. the maximum continuous output current for the aat3242 is a function of the package power dissi- pation and the input-to-output voltage drop across the ldo regulator. to determine the maximum output current for a given output voltage, refer to the following equation. this calculation accounts for the total power dissipation of the ldo regulator, including that caused by ground current. this formula can be solved for i outa to determine the maximum output current for ldoa: p d(max) = t j(max) - t a ja i outa(max) = p d(max) - (2 v in i gnd ) - (v in - v outb ) i outb v in - v outa p d(max) = [(v in - v outa )i outa + (v in x i gnd )] + [(v in - v outb )i outb + (v in x i gnd )]
aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 13 the following is an example for a 2.5v output: v outa = 2.5v v outb = 1.5v i outb = 150ma from the discussion above, p d(max) was determined to equal 909mw at t a = 25c. therefore, with regulator b delivering 150ma at 1.5v, regulator a can sustain a constant 2.5v output at a 296ma load current at an ambient temperature of 25c. higher input-to-output voltage differentials can be obtained with the aat3242, while maintaining device functions within the thermal safe operating area. to accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by oper- ating the ldo regulator in a duty-cycled mode. for example, an application requires v in = 4.2v while v out = 1.5v at a 500ma load and t a = 25c. to main- tain this high input voltage and output current level, the ldo regulator must be operated in a duty-cycled mode. refer to the following calculation for duty-cycle operation: i gnd = 125a i out = 500ma p d(max) is assumed to be 909mw for a 500ma output current and a 2.7v drop across the aat3242 at an ambient temperature of 25c, the max- imum on-time duty cycle for the device would be 48.10%. %dc = v in = 4.2v v out = 1.5v %dc = 48.10% 100(p d(max) ) [(v in - v outa )i outa + (v in i gnd )] + [(v in - v outb )i outb + (v in i gnd )] %dc = 100(909mw) [(4.2v - 1.5v)500ma + (4.2v 125 a)] + [(4.2v - 1.5v)200ma + (4.2v 125 a)] i outa(max) = v in = 4.2v i gnd = 125 a i outa(max) = 296ma 909mw - (2 4.2v 125 a) - (4.2 - 1.5) 150ma 4.2 - 2.5
aat3242 300ma/150ma dual cmos ldo linear regulator 14 3242.2006.04.1.10 ordering information voltage package ldo a ldo b marking 1 part number (tape and reel) 2 tsopjw-12 3.3v 2.5v lsxyy aat3242itp-wn-t1 tsopjw-12 3.3v 1.8v paxyy aat3242itp-wi-t1 tsopjw-12 3.0v 2.85v lpxyy aat3242itp-tr-t1 tsopjw-12 3.0v 2.5v ljxyy aat3242itp-tn-t1 tsopjw-12 3.0v 1.8v lhxyy aat3242itp-ti-t1 tsopjw-12 3.0v 1.5v ntxyy aat3242itp-tg-t1 tsopjw-12 2.9v 1.5v moxyy aat3242itp-sg-t1 tsopjw-12 2.8v 3.0v lvxyy aat3242itp-qt-t1 tsopjw-12 2.8v 2.8v ldxyy aat3242itp-qq-t1 tsopjw-12 2.8v 2.6v lqxyy aat3242itp-qo-t1 tsopjw-12 2.8v 2.5v llxyy aat3242itp-qn-t1 tsopjw-12 2.8v 1.9v lrxyy aat3242itp-qy-t1 tsopjw-12 2.8v 1.5v mcxyy aat3242itp-qg-t1 tsopjw-12 2.7v 2.7v loxyy aat3242itp-pp-t1 tsopjw-12 2.6v 1.8v mjxyy aat3242itp-oi-t1 tsopjw-12 2.5v 1.8v sgxyy aat3242itp-in-t1 tsopjw-12 1.8v 1.5v aat3242itp-ig-t1 tsopjw-12 1.8v 2.7v pzxyy aat3242itp-ip-t1 tsopjw-12 1.8v 2.8v rrxyy AAT3242ITP-IQ-T1 legend voltage code 1.5 g 1.8 i 1.9 y 2.5 n 2.6 o 2.7 p 2.8 q 2.85 r 2.9 s 3.0 t 3.3 w 1. xyy = assembly and date code. 2. sample stock is generally held on part numbers listed in bold . all analogictech products are offered in pb-free packaging. the term ?pb-free? means semiconductor products that are in compliance with current rohs standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. for more information, please visit our website at http://www.analogictech.com/pbfree.
package information tsopjw-12 all dimensions in millimeters. aat3242 300ma/150ma dual cmos ldo linear regulator 3242.2006.04.1.10 15 0.20 + 0.10 - 0.05 0.055 0.045 0.45 0.15 7 nom 4 4 3.00 0.10 2.40 0.10 2.85 0.20 0.50 bsc 0.50 bsc 0.50 bsc 0.50 bsc 0.50 bsc 0.15 0.05 0.9625 0.0375 1.00 + 0.10 - 0.065 0.04 ref 0.010 2.75 0.25
aat3242 300ma/150ma dual cmos ldo linear regulator 16 3242.2006.04.1.10 advanced analogic technologies, inc. 830 e. arques avenue, sunnyvale, ca 94085 phone (408) 737-4600 fax (408) 737-4611 ? advanced analogic technologies, inc. analogictech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an analogictech pr oduct. no circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. analogictech reserves the right to make changes to their products or specifi cations or to discontinue any product or service without notice. customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information b eing relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warran ty, patent infringement, and limitation of liability. analogictech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with anal ogictech?s standard warranty. testing and other quality con- trol techniques are utilized to the extent analogictech deems necessary to support this warranty. specific testing of all param eters of each device is not necessarily performed.

▲Up To Search▲

Price & Availability of AAT3242ITP-IQ-T1

	To Download AAT3242ITP-IQ-T1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .